Senior Asic Design Engineer

Company: Cisco Systems, Inc.
Location: San Jose
Posted on: April 7, 2025

Job Description:

Cisco Silicon One ( #CiscoSiliconOne ) brings together networking, compute and storage all in a single system. Come join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, Security etc.). Our Hardware and Software solutions are tightly coupled with the development cycles that give us an unparalleled advantage in enabling our customers adopt the latest what technology can offer. As part of Cisco Silicon One (#CiscoSiliconOne) our team develops complex, high-performance, feature-rich ASICs used in Cisco's networking products and third-party custom-built hardware solutions.What You'll Do

• Be part of the development organization as a Senior ASIC Design Engineer with primary focus on RTL Design.
• Create micro-architecture specifications and participate in reviews.
• Implement Verilog RTL to meet timing and performance requirements.
• Help define, evolve, and support our design methodology.
• Collaborate with the verification team on as-needed basis to address design bugs and close code coverage.
• Work closely with physical design team to close design timing and place-and-route issues.
• Triage, debug, and root cause simulation, software bring-up, and customer failures.
• Perform diagnostic and post silicon validation tests in the lab.Who You'll Work WithYou will work with front-end RTL Design and Verification teams and Architects to understand chip architecture. You'll work with SDK and Software teams as part of ASIC development to create a seamless handshake between hardware and software functionalities and qualify use-case requirements. You'll also work with systems-testing teams as part of post-silicon validation efforts to bring-up, debug and qualify the ASIC in deployment-mode applications.Who You Are
  • A problem solver who loves to take on new challenges
  • A strong communicator in a team setting
  • An Engineer who enjoys working in a dynamic team environment
  • Someone who thrives on innovative technology
  • Bachelor's or a Master's Degree in Electrical or Computer Engineering.
  • 7+ years of related work experience
  • Experience with simulators/synthesis/static timing constraints and related tools
  • Good understanding of verification methodologies and flow
  • Strong interactive and waveform debug skills.
  • Good written and verbal communication skills.Preferred requirements:
    • Understanding of Networking technologies and concepts.
    • Experience with ARM protocols (AXI, CHI, APB, AHB) and exposure to ARM CPUs is desirable.
    • Design experience with Ethernet MAC, DDR/LPDDR, PCIE, and DMA controllers is a plus.
    • Experience with Integrating 3rd party IPs into SoC is desirable
    • Strong scripting experience (Python, Perl, TCL, shell programming) highly desirable.
    • Experience with Emulation and Formal Verification tools is a plus.We Are Cisco#WeAreCisco, where each person is unique, but we bring our talents to work as a team and make a difference powering an inclusive future for all. We embrace digital, and help our customers implement change in their businesses, AND we are a hardware company, a software company, and a security company. We even invented an intuitive network that adapts, predicts, learns and protects. No other company can do what we do - you can't put us in a box! Cisco is at the vanguard of impact: delivering our technology in meaningful ways allowing people to live more.
      #J-18808-Ljbffr

Keywords: Cisco Systems, Inc., San Jose , Senior Asic Design Engineer, Engineering , San Jose, California