Post Silicon Validation and Application Engineer

Company: Cisco Systems, Inc.
Location: San Jose
Posted on: March 23, 2025

Job Description:

Post Silicon Validation and Application EngineerLocation: San Jose, California, USArea of Interest: Engineer - HardwareCompensation Range: 149600 USD - 214100 USDJob Type: ProfessionalAI or Artificial IntelligenceJob Id: 1437362The application window is expected to close on 4/3/25.This role will work onsite out of our San Jose, CA office.The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from top-of-rack (TOR) switches all the way through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry.Meet The Team:Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and interact with cross-functional software and product teams, working together to ensure the successful deployment of the ASIC in products.Your Impact:In this role as a Silicon Validation and Application Engineer you will be responsible for:

• ASIC bring-up and post-silicon validation.
• Test generation, test infrastructure setup, bring-up planning and execution, validation plan development and execution.
• Work closely with internal and external system teams to make sure the ASIC is configured correctly and performing as expected.
• Work with hardware and software teams to triage and root cause system, SDK/Software, and customer failures.
• Enable faster/easier debugging by building supporting tools/script/infrastructure and reproducing issues in emulator.
• Continuously optimize validation and productization processes and methodologies to improve overall quality and efficiency.Minimum Qualifications:
  • Bachelor's degree in Electrical or Computer engineering and 8+ years of ASIC DV experience.
  • Experience in digital design, systems, and microarchitecture. Deep understanding of SW/firmware and HW/SW interaction.
  • Knowledge of networking and network protocols - Routers, switches, schedulers, buffers, traffic manager etc.
  • Experience with ASIC Design verification, silicon bring-up, and post silicon validation.
  • Experience with C/C++, System Verilog programming, and Scripting (Python, Perl, TCL, shell programming).Preferred Qualifications:
    • Master's degree in Electrical or Computer engineering and 10+ years of ASIC Design experience.
    • Ability to communicate technical concepts to audiences spanning executives to junior engineers.
    • Excellent problem-solving, teamwork, and interpersonal skills.
    • Capable of working in a constantly evolving environment without losing focus.
    • Experience with the usage of emulators.#WeAreCiscoOur purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
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Keywords: Cisco Systems, Inc., San Jose , Post Silicon Validation and Application Engineer, Engineering , San Jose, California