Design Engineer - SoC Boot, Power Management and Security

Company: Alphawave IP Inc
Location: San Jose
Posted on: March 31, 2025

Job Description:

Design Engineer - SoC Boot, Power Management and SecurityDesign Engineer - SoC Boot, Power Management and SecurityApply locations San Jose time type Full time posted on Posted Yesterday job requisition id JR100852The OpportunityWe're looking for the Wavemakers of tomorrow.Alphawave Semi enables tomorrow's future by accelerating the critical data communication at the heart of our digital world - from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.Why Join Us?

• Opportunity to work on cutting-edge ARM-based SoC designs.
• Work with a team in a high-impact, fast-paced environment.
• Competitive compensation and career growth opportunities.
• Work alongside some of the best minds in the semiconductor industry.What You'll Do
  • Leading design for SoC Subsystem targeted for Boot, Security, power management, and low speed peripherals using Arm CPU Core in an inclusive team environment.
  • Architecting, Planning Design activities at subsystem level.
  • Demonstrate expertise in boot, security and low power multi core Arm CPU based SoC.
  • Collaborate with the design verification team to debug.
  • Demonstrate expertise knowledge in design of SoC Boot, Security that includes RoT, security components at SoC level.
  • Integration and support for slow speed peripherals such as I2C, xSPI, eMMC, UART, JTAG, GPIOs, Debugger, etc.
  • Support Emulation and FPGA teams.
  • Low power methodology that includes multi power domain, multi-voltage domain, DVFS.
  • Define implementation strategy for Power-Performance metric for SoC with Architects.What You'll Need
    • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field.
    • This role requires a minimum of 8+ years of ASIC Micro-architecture and RTL design experience.
    • Proficiency in System Verilog, VHDL, Verilog, C.
    • Proficiency with ARM-specific System Management design.
    • Strong background in digital design, RTL coding (Verilog/VHDL), and ASIC/FPGA debug methodologies.
    • Proven experience in SOC design.
    • Deep understanding of hardware design, verification, and post-silicon validation.It Would Be Amazing If You Had
      • Experience in multi-core, multi-voltage, multi-power domain debug design micro-architecture and RTL design.
      • Experience in designing SoC with slow speed peripherals such as I2C, SPI, eMMC, UART, GPIOs, JTAG/SW.
      • Experience with boot flow and SoC security implementation using Arm components.
      • Supporting and bringing up FPGA, Emulation based systems targeting PCIe.
      • Experience working across multiple chiplets in large-scale SOCs.
      • Hands-on SoC bring up experience in a lab environment.We have a flexible work environment to support and help employees thrive in personal and professional capacities.Salary and BenefitsYour contribution will be recognized with a base salary within the range of $140,000 to $210,000 annually as it is influenced by your qualifications, experience, location, and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible for additional compensation opportunities, including a short-term incentive program, Retirement & Saving Programs and participation in the Employee Stock Purchase Plan (ESPP).You'll also be eligible for competitive benefits described as per below:Health & Wellness
        • Comprehensive health plans.
        • Wellness Spending Account (WSA).
        • Employee Assistance Program (EAP).Time Off
          • Paid Vacation.
          • Paid Holidays.
          • Parental Leave.Equal Employment Opportunity StatementAlphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.
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Keywords: Alphawave IP Inc, San Jose , Design Engineer - SoC Boot, Power Management and Security, Executive , San Jose, California