Staff Engineer, DRAM

Company: Conductor
Location: San Jose
Posted on: March 27, 2025

Job Description:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.Advancing the World's Technology TogetherOur technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll DoThe DRAM Design Lab (DDL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM and NAND Flash. DDL's vision is to solve key problems in developing next-generation DRAM solutions, including High Bandwidth Memory (HBM). We are an integral part of Samsung's strong R&D focus and lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.Come join the team that is designing HBM products, developing DRAM architecture, co-working with head office, and managing customers in all stages of design. You'll focus on enhancement of full chip simulation checks, DFT consultation, IDD/PDN checking reliability by developing the architecture of DRAM and optimizing it for mass production.Location: Hybrid with at least 3 days in the office in San Jose, CA office location; remainder of time to work remotely.Responsibilities:

• Develop DRAM architecture and optimize floorplan for next-generation DRAM.
• Lead design specification, performance analysis, and test planning.
• Technical interactions with internal and external customers.
• Develop ROW, Column Bank architecture design and related test modes.
• Develop methods to reduce DRAM power consumption.
• Analyze electrical data from silicon and validate new core design architecture performance.
• Develop and implement a DFT architecture and methodology for the product.
• Power delivery network floor planning and optimization.
• Collaboratively design with cross-functional teams, such as product managers, engineers, and marketers, to ensure that designs align with the product vision and strategy.
• Identify device requirements for the advanced memory product design.
• Collaborate with process integration, quality assurance, product engineering, and modeling group for DRAM design architecture and technology optimization.What You Bring
  • Bachelors with 15+ years of relevant industry experience, or Masters with 13+ years, or PhD with 10+ years in DRAM or a related technical field preferred.
  • Required knowledge, achievements, and skillsets in memory design.
  • Proficient with design software and statistical analysis tools.
  • Strong experience in DRAM I/O interfaces and SERDES.
  • Proficiency in DRAM full chip functional verification.
  • Comprehensive understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis.
  • Demonstrated track record of innovation and creativity in problem-solving.
  • You're inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You're collaborative, building relationships, humbly offering support, and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.What We OfferThe pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors-including the role's function and location, as well as the individual's knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance.This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.Base Pay Range: $180,950 - $289,050 USDEqual Opportunity Employment PolicySamsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.Covid-19 PolicyTo help keep our employees, customers, and communities safe, we've developed guidelines for our teams. Currently, we encourage vaccination for all employees and may require it depending on job functions (e.g., traveling for business, meeting with customers). While visiting our offices or attending team events, we ask employees to complete a daily health questionnaire and complete a weekly COVID test. Our COVID policies are subject to change depending on public health, regulatory, and business circumstances.
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Keywords: Conductor, San Jose , Staff Engineer, DRAM, Engineering , San Jose, California